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CODE MNE3114

 
TITLE Analogue VLSI Signal Conditioning 1

 
LEVEL 03 - Years 2, 3, 4 in Modular Undergraduate Course

 
ECTS CREDITS 5

 
DEPARTMENT Microelectronics and Nanoelectronics

 
DESCRIPTION The study-unit covers basic integrated components and building block used in analogue VLSI signal conditioning including: active resistors, current sources and current mirrors, inverter amplifiers, differential amplifiers and CMOS transconductance amplifiers. Detailed analysis and operation of these building blocks is explained, including d.c. analysis, a.c. low-frequency and high-frequency operation.

Study-unit Aims

The study-unit aims to train students in the analysis and design of analogue signal conditioning building blocks, used in integrated circuit design, including:

- current sources and current mirrors;
- inverter amplifiers;
- differential amplifiers;
- operational transconductance amplifiers.

Learning Outcomes

1. Knowledge & Understanding:
By the end of the study-unit the student will be able to:

- comprehend, analyse and design analogue signal-conditioning integrated circuits including current mirrors, inverter amplifiers, differential amplifiers and OTAs;
- comprehend and carry out d.c. biasing analysis and a.c. low-frequency and high-frequency analysis of the above analogue signal-conditioning integrated circuit building blocks.

2. Skills:

By the end of the study-unit the student will be able to use CADENCE framework software in connection with schematic capture design and simulation of analogue signal-conditioning circuits.

Main Text/s and any supplementary readings

R.L. Geiger, P.E. Allen and N.R. Strader, "VLSI Design for Analog and Digital Circuits", McGraw-Hill, ISBN: 0-07-100728-8.

 
ADDITIONAL NOTES Pre-Requisite Study-unit: MNE1101

 
STUDY-UNIT TYPE Lecture, Practicum & Tutorial

 
METHOD OF ASSESSMENT
Assessment Component/s Resit Availability Weighting
Practical No 20%
Examination (2 Hours and 30 Minutes) Yes 80%

 
LECTURER/S Joseph Micallef (Co-ord.)

 
The University makes every effort to ensure that the published Courses Plans, Programmes of Study and Study-Unit information are complete and up-to-date at the time of publication. The University reserves the right to make changes in case errors are detected after publication.
The availability of optional units may be subject to timetabling constraints.
Units not attracting a sufficient number of registrations may be withdrawn without notice.
It should be noted that all the information in the study-unit description above applies to the academic year 2017/8, if study-unit is available during this academic year, and may be subject to change in subsequent years.
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13th Edition of EY’s Annual Attractiveness Event

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The 13th Edition of EY’s Annual Attractiveness event will be held on 25th October 2017 at the InterContinental Hotel,

St. Julians. It is titled "Thinking without the box: disruption, technology and FDI".

 

The  students' invitation and more information can be found here

The conference programme can be found here

 

 
 

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