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Study-Unit Description
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CODE MNE1102

 
TITLE Introduction to Microelectronics

 
LEVEL 01 - Year 1 in Modular Undergraduate Course

 
ECTS CREDITS 6

 
DEPARTMENT Microelectronics and Nanoelectronics

 
DESCRIPTION The study-unit covers semiconductor materials and technologies; MOS technology; regions of operation of MOS transistors: strong inversion, subthreshold operation. This study unit then moves to analysis of d.c. operation, channel length modulation effect, body effect and d.c. biasing in MOS IC design.

The study-unit also covers a.c., small-signal, operation of the MOS transistor, transconductance, bulk transconductance, output resistance; capacitances in nanometer-scale transistors; first-order and second-order small-signal models.

Bipolar technology is next considered: bipolar transistor structure, vertical npn transistor, lateral pnp transistor, d.c. operation, d.c. biasing in IC design, a.c., small-signal operation; junction and diffusion capacitances; first-order and second-order small-signal models.

Study-unit Aims

This study-unit aims at imparting to students knowledge about semiconductor materials and their application in two fundamental microelectronics technologies: MOS and Bipolar.

The unit further aims to familiarise students with properties of the basic active devices used in integrated circuits: the MOS transistor and Bipolar transistor, considered with respect to structure, d.c. operation and a.c. small-signal operation, in the IC design environment.

Learning Outcomes

1. Knowledge & Understanding:
By the end of the study-unit the student will be able to:

- comprehend physics principles involved that give rise to semiconductor material properties;
- comprehend and analyse the operation and properties of the MOS transistor and the bipolar transistor in the IC design environment.

2. Skills:
By the end of the study-unit the student will be able to:

- carry out d.c. biasing analysis and a.c., small-signal analysis of the MOS transistor and the bipolar transistor in the IC design environment;
- use CADENCE framework software in connection with simulation of d.c. and a.c. reponse of MOS and bipolar transistors.

Main Text/s and any supplementary readings

R.L. Geiger, P.E. Allen and N.R. Strader, "VLSI Design for Analog and Digital Circuits", McGraw-Hill, ISBN: 0-07-100728-8.

 
STUDY-UNIT TYPE Lecture, Practicum & Tutorial

 
METHOD OF ASSESSMENT
Assessment Component/s Resit Availability Weighting
Practical No 15%
Examination (2 Hours) Yes 85%

 
LECTURER/S Owen Casha (Co-ord.)

 
The University makes every effort to ensure that the published Courses Plans, Programmes of Study and Study-Unit information are complete and up-to-date at the time of publication. The University reserves the right to make changes in case errors are detected after publication.
The availability of optional units may be subject to timetabling constraints.
Units not attracting a sufficient number of registrations may be withdrawn without notice.
It should be noted that all the information in the study-unit description above applies to the academic year 2017/8, if study-unit is available during this academic year, and may be subject to change in subsequent years.
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