A 1 V second order Sigma-Delta modulator

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Title:	A 1 V second order Sigma-Delta modulator
Authors:	Grech, Ivan Micallef, Joseph Debono, Carl James Malcovati, Piero Maloberti, Franco
Keywords:	Low voltage integrated circuits Modulators (Electronics) Analog CMOS integrated circuits
Issue Date:	2001
Publisher:	Kluwer Academic Publishers
Citation:	Grech, I., Micallef, J., Debono, C. J., Malcovati, P., & Maloberti, F. (2001). A 1 V second order sigma-delta modulator. Analog Integrated Circuits and Signal Processing, 27(1-2), 147-159.
Abstract:	A second order switched capacitor sigma-delta modulator operating at a supply voltage of 1 V is presented. This low supply voltage restricts the gate overdrive voltage available for switching transistors. The design relies on the elimination of critical switches by using a modified switched op amp for the integrator and novel switched half-supply and reference voltage generators. The design has been carried out in a fully differential configuration in order to minimize errors arising from charge injection and clock-feedthrough effects. The converter has been implemented using a conventional 0.8 μm double-poly double-metal CMOS process, having a nominal threshold voltage of 0.75 V. Test results, showing more than 9 bits of resolution with an oversampling ratio of 64, are also presented.
URI:	https://www.um.edu.mt/library/oar//handle/123456789/16270
Appears in Collections:	Scholarly Works - FacICTCCE Scholarly Works - FacICTMN

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