Development of an new ASIC based, multi-channel data acquisition and real-time processing system

Abstract

This work presents the development of a newly Application Specific Integrated Circuit suitable for the simultaneous readout, real-time measurement, and processing of digital data in a multi-channel data acquisition system. High-speed multi-channel digitizers are useful for large-scale high-energy physics, astrophysics, nuclear and plasma physics experiments. The developed application specific integrated circuit allows the simultaneous continuous readout and processing of 240 12-bit analogue channels, at data transfer rates of 4.0 Gbps via five 3-lane Low-Voltage Differential Signaling transmitter drivers. Additionally, unlike the various vendor-defined high-speed digitizers that are currently available in the market, the developed ceramic quad flat 160-pin package microelectronic circuitry includes the implementation of an integrated fault tolerant and recoverable Triple-Modular Redundancy voting circuitry, use of Zero-suppression compression algorithm and implementation of Cyclic-Redundancy Check technique. The integration of such features reduces development time and enables the developed integrated circuitry to be used in a radiation physics environment where single-event upset or latch-up could lead to event data corruption or even electronic failures. The implemented system architecture lowers maintenance costs, and further improves system performance by ten-fold when compared for example to other various data acquisition readout electronic systems currently present in the A Large Ion Collider experiment in CERN. Additionally, the developed XFAB 180 nm 6-layer parallel readout integrated circuit architecture can be easily interfaced with other various vendor-specific analogue-to-digital convertor modules that are currently available on the market, thus further facilitating the upgrading process of data acquisition systems.