Please use this identifier to cite or link to this item:
https://www.um.edu.mt/library/oar/handle/123456789/16529| Title: | The implementation of a high speed adaptive FIR filter on a field programmable gate array |
| Authors: | Vella, Marc Debono, Carl James |
| Keywords: | Field programmable gate arrays Signal processing Adaptive filters Echo suppression (Telecommunication) |
| Issue Date: | 2006 |
| Publisher: | Institute of Electrical and Electronics Engineers Inc. |
| Citation: | Vella, M., & Debono, C. J. (2006). The implementation of a high speed adaptive FIR filter on a field programmable gate array. 2006 IEEE Mediterranean Electrotechnical Conference, Malaga. 113-116. |
| Abstract: | Adaptive filters have become a very useful building block in several of today's systems. One of the most common application being line echo cancellation (LEC). The ever increasing data rates used in such communication systems bring along the need for faster adaptive filtering systems that are capable of handling the echo tail generated. This poses two main requirements, i) robust and stable algorithms to ensure efficient functionality under these conditions and ii) more processing power. This paper describes the implementation of such an adaptive filter on a Xilinx Spartan 3 FPGA for use in an echo cancellation system. |
| URI: | https://www.um.edu.mt/library/oar//handle/123456789/16529 |
| Appears in Collections: | Scholarly Works - FacICTCCE |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| Conference paper - The Implementation of a High Speed Adaptive FIR Filter on a Field Programmable Gate Array.pdf Restricted Access | The implementation of a high speed adaptive FIR filter on a field programmable gate array | 294.6 kB | Adobe PDF | View/Open Request a copy |
Items in OAR@UM are protected by copyright, with all rights reserved, unless otherwise indicated.