Multi-stage languages in hardware design

Abstract

As circuits increase in size and complexity, hardware description techniques have been trying to adopt features already well- established in software languages. In this paper, we investigate how

different hardware description languages implement levels of abstraction over the hardware designs, and we examine how improvements

have lead to features like parameterised circuits and generic descriptions, that enable users to efficiently model and reason about large

regular-shaped structures and connection patterns. Nonetheless, the

ability to include non-functional properties of circuits in the same description is still an open issue. Lately, proposed solutions are looking

into meta-functional languages and multi-staging techniques. We examine how hardware description languages can benefit from the capabilities of meta-functional languages, which are able to reason about,

and transform the circuit generators as data objects, thus providing a means to access both the functional and non-functional aspects of the generated circuits.