Please use this identifier to cite or link to this item: https://www.um.edu.mt/library/oar/handle/123456789/27413
Title: Selective virtual capacitive impedance loop for harmonic voltage compensation in islanded microgrids
Authors: Micallef, Alexander
Apap, Maurice
Spiteri Staines, Cyril
Guerrero, Josep M.
Keywords: Microgrids (Smart power grids)
Electric inverters
Capacitors
Issue Date: 2013-11
Publisher: Institute of Electrical and Electronics Engineers Inc.
Citation: Micallef, A., Apap, M., Spiteri Staines, C., & Guerrero, J. M. (2013). Selective virtual capacitive impedance loop for harmonic voltage compensation in islanded MicroGrids. 39th Annual Conference of the IEEE: Industrial Electronics Society, IECON 2013, Vienna.
Abstract: Parallel inverters having LCL output filters cause voltage distortions at the point of common coupling (PCC) in islanded microgrids when non-linear loads are present. A capacitive virtual impedance loop could be used to provide selective harmonic compensation in islanded microgrids, instead of introducing additional active or passive filters into the system that could compromise the stability of the microgrid. However, the performance of these compensation loops becomes degraded when a virtual resistance is introduced with the aim to improve the overall stability of the parallel inverters. With the capacitive virtual impedance, there is effectively a compromise between the additional stability provided by the virtual resistance and the harmonic compensation due to the virtual capacitance. This paper focuses on overcoming this limitation of the capacitive virtual impedance with additional virtual resistance for selective harmonic compensation in islanded microgrids. Simulation results were given to show the suitability of the proposed algorithms in reducing the voltage harmonics at the PCC.
URI: https://www.um.edu.mt/library/oar//handle/123456789/27413
Appears in Collections:Scholarly Works - FacEngEE



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