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Please use this identifier to cite or link to this item: https://www.um.edu.mt/library/oar/handle/123456789/59234
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dc.contributor.authorJordan Lee, Gauci-
dc.contributor.authorGatt, Edward-
dc.contributor.authorCasha, Owen-
dc.contributor.authorDe Cataldo, Giacinto-
dc.contributor.authorGrech, Ivan-
dc.contributor.authorMicallef, Joseph-
dc.date.accessioned2020-08-03T06:24:55Z-
dc.date.available2020-08-03T06:24:55Z-
dc.date.issued2018-
dc.identifier.citationGauci, J. L., Gatt, E., Casha, O., De Cataldo, G., Grech, I., & Micallef, J. (2018). Design of a quasi-linear rail-to-rail delay element with an extended programmable range. 2018 25th IEEE International Conference on Electronics, Circuits and Systems (ICECS), Bordeaux.en_GB
dc.identifier.urihttps://www.um.edu.mt/library/oar/handle/123456789/59234-
dc.description.abstractThis paper presents an analytical model of a quasi-linear delay element to be used in the High Momentum Particle Identification Detector (HMPID) at the CERN Large Hadron Collider (LHC). The aim of this model is to facilitate the design of a delay element in order to achieve the required range while maximizing linearity. In addition, a technique is proposed to further increase the delay range by means of a programmable banked capacitor architecture without sacrificing linearity. The design of a rail-to-rail quasi-linear delay element with a range spanning from 125 ns to 580 ns was achieved. The proposed model was verified via simulations performed in Cadence using the X-FAB 0.18 μm technology.en_GB
dc.language.isoenen_GB
dc.publisherInstitute of Electrical and Electronics Engineersen_GB
dc.rightsinfo:eu-repo/semantics/restrictedAccessen_GB
dc.subjectTransistorsen_GB
dc.subjectCapacitorsen_GB
dc.subjectElectric invertersen_GB
dc.subjectAsynchronous circuitsen_GB
dc.subjectPosition sensitive particle detectorsen_GB
dc.titleDesign of a quasi-linear rail-to-rail delay element with an extended programmable rangeen_GB
dc.typeconferenceObjecten_GB
dc.rights.holderThe copyright of this work belongs to the author(s)/publisher. The rights of this work are as defined by the appropriate Copyright Legislation or as modified by any successive legislation. Users may access this work and can make use of the information contained in accordance with the Copyright Legislation provided that the author must be properly acknowledged. Further distribution or reproduction in any format is prohibited without the prior permission of the copyright holder.en_GB
dc.bibliographicCitation.conferencename2018 25th IEEE International Conference on Electronics, Circuits and Systems (ICECS)en_GB
dc.bibliographicCitation.conferenceplaceBordeaux, France, 09-12/12/2018en_GB
dc.description.reviewedpeer-revieweden_GB
dc.identifier.doi10.1109/ICECS.2018.8617855-
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