Study-Unit Description

Study-Unit Description


CODE CCE1014

 
TITLE Computer Logic 2

 
LEVEL 01 - Year 1 in Modular Undergraduate Course

 
ECTS CREDITS 5

 
DEPARTMENT Communications and Computer Engineering

 
DESCRIPTION The fundamental topics in sequential logic are covered in this unit. The topics include the concept of state and transitions between different states. The study-unit also covers the use of sequential building blocks such as latches and flip-flops to design and implement systems such as shift registers and counters. These concepts are developed to include the design and implementation of finite state machines (FSMs).

The study-unit also provides an understanding of sequential arithmetic algorithms used in computer design. The control unit is also explored, and an overview of the different implementation techniques is given. Different memory technologies, such as SRAM and DRAM, are explored with attention to their different characteristics and their suitability for different applications.

Study-Unit Aims:

- To explain the nature of state machines;
- To explain the design of sequential logic systems and state machines;
- To explain the design of a control unit as used within a computer microprocessor.

Learning Outcomes:

1. Knowledge & Understanding:

By the end of the study-unit the student will be able to:
- Distinguish between sequential logic building blocks: RS latches, JK, D, T flip-flops;
- Interpret timing diagrams;
- Analyse and design shift registers and counters;
- Distinguish between Mealy and Moore FSMs;
- Illustrate sequential arithmetic algorithms, including floating-point arithmetic;
- Describe the instruction cycle;
- Describe the buses and registers inside a computer microprocessor control unit;
- Distinguish between single-cycle, multicycle, and pipelined processors, and between hardwired and microprogrammed control units;
- Contrast SRAM and DRAM.

2. Skills:

By the end of the study-unit the student will be able to:
- Implement sequential logic circuits using flip flops;
- Design and Implement FSMs;
- Design a control unit using FSM techniques;
- Implement a sequential logic system in hardware.

Main Text/s and any supplementary readings:

Main Texts:

- D. M. Harris and S. L. Harris, Digital Design and Computer Architecture, 2nd. ed., Morgan Kaufmann, 2013.
- W. Stallings, Computer Organization and Architecture, 9th. ed., Pearson, 2013.

 
ADDITIONAL NOTES This study-unit builds on CCE1013.

 
STUDY-UNIT TYPE Lecture, Independent Study, Practicum & Tutorial

 
METHOD OF ASSESSMENT
Assessment Component/s Assessment Due Resit Availability Weighting
Practical SEM2 Yes 20%
Take Home Examination (2 Hours) SEM2 Yes 80%

 
LECTURER/S Trevor Spiteri

 
The University makes every effort to ensure that the published Courses Plans, Programmes of Study and Study-Unit information are complete and up-to-date at the time of publication. The University reserves the right to make changes in case errors are detected after publication.
The availability of optional units may be subject to timetabling constraints.
Units not attracting a sufficient number of registrations may be withdrawn without notice.
It should be noted that all the information in the description above applies to study-units available during the academic year 2020/1. It may be subject to change in subsequent years.

https://www.um.edu.mt/course/studyunit