Please use this identifier to cite or link to this item:
https://www.um.edu.mt/library/oar/handle/123456789/59236
Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Seguna, Clive | - |
dc.contributor.author | Gatt, Edward | - |
dc.contributor.author | Grech, Ivan | - |
dc.contributor.author | Casha, Owen | - |
dc.contributor.author | De Cataldo, Giacinto | - |
dc.date.accessioned | 2020-08-03T06:29:36Z | - |
dc.date.available | 2020-08-03T06:29:36Z | - |
dc.date.issued | 2018 | - |
dc.identifier.citation | Seguna, C., Gatt, E., De Cataldo, G., Casha, O., & Grech, I. (2018). A new front-end readout electronics for the ALICE charged-particle veto detector. CENICS 2018 : The Eleventh International Conference on Advances in Circuits, Electronics and Micro-electronics, Venice. 11-15. | en_GB |
dc.identifier.isbn | 9781612086644 | - |
dc.identifier.uri | https://www.um.edu.mt/library/oar/handle/123456789/59236 | - |
dc.description.abstract | The A Large Ion Collider Experiment (ALICE) upgrade strategy is based on collecting more than 10 nb-1 of Pb-Pb collisions at luminosities of 6x1027 cm-2s-1 which corresponds to a collision rate of 50 kHz for Pb-Pb and 200 kHz for pp and p-Pb. Such high beam luminosity requirements cannot be met with the presently existing electronics having a low readout rate of 5 kHz. This work presents the design of a new front-end readout electronics for the Charged-Particle Veto detector (CPV) module located in PHOton Spectrometer (PHOS). The proposed new architecture, when compared to prior systems, allows the parallel readout and processing of all 480 silicon photomultiplier pads that are connected to digital signal processing cards. Preliminary results demonstrate that this work will enable the CPV detector to reach an interaction rate of at least 50 kHz. The system design consists of three modules, each containing two segment boards, two Readout Common Boards (RCBs) and 16 digital signal processors called DiLogic cards. This paper presents the architecture layout and preliminary performance measurement results for the proposed new design. This work concludes with recommendations for other future planned updates in hardware schema. | en_GB |
dc.language.iso | en | en_GB |
dc.publisher | Technische Informationsbibliothek (TIB) - German National Library of Science and Technology | en_GB |
dc.rights | info:eu-repo/semantics/restrictedAccess | en_GB |
dc.subject | Electronics | en_GB |
dc.subject | Detectors | en_GB |
dc.subject | Field programmable gate arrays | en_GB |
dc.title | A new front-end readout electronics for the ALICE charged-particle veto detector | en_GB |
dc.type | conferenceObject | en_GB |
dc.rights.holder | The copyright of this work belongs to the author(s)/publisher. The rights of this work are as defined by the appropriate Copyright Legislation or as modified by any successive legislation. Users may access this work and can make use of the information contained in accordance with the Copyright Legislation provided that the author must be properly acknowledged. Further distribution or reproduction in any format is prohibited without the prior permission of the copyright holder. | en_GB |
dc.bibliographicCitation.conferencename | CENICS 2018: The Eleventh International Conference on Advances in Circuits, Electronics and Micro-electronics | en_GB |
dc.bibliographicCitation.conferenceplace | Venice, Italy, 16-20/09/2018 | en_GB |
dc.description.reviewed | peer-reviewed | en_GB |
Appears in Collections: | Scholarly Works - FacICTMN |
Files in This Item:
File | Description | Size | Format | |
---|---|---|---|---|
A_new_front-end_readout_electronics_for_the_ALICE_charged-particle_veto_detector_2018.pdf Restricted Access | 609.64 kB | Adobe PDF | View/Open Request a copy |
Items in OAR@UM are protected by copyright, with all rights reserved, unless otherwise indicated.