Implementation of the PCI protocol on an FPGA

Abstract

The Peripheral Component Interconnect (PCI) is a widely used, high-performance, computer bus which allows for transfer of data between a peripheral and a processor/memory system. The PCI local bus, designed in 1992 was designed to tackle bottlenecks created with the increase of graphic intensive operating systems, such as Windows. By implementing the PCI Local Bus on a Field Programmable Gate Array, we can create a low-cost, flexible interface which can be used by a variety of devices [1], [2] The objectives of this project are to implement a basic, reliable PCI bus on an FPGA which can then be simulated and tested. The basic functionalities of the PCI Local Bus must be implemented, with data arriving from the back-end and transmitted on the PCI Bus, while adhering to the PCI protocol. The resulting system is made up of three blocks which together can read data from the back-end of a non-standard, user-defined system and this data is sent onto the PCI Bus.