Access to circuit generators in embedded hdls

Abstract

General purpose functional languages have been widely used as host languages for the embedding of domain specific languages, especially hardware description languages. The embedding approach provides various

abstraction techniques, enabling the description of generators for whole

families of circuits, in particular parameterised regular circuits. The two-stage language setting that is achieved by means of embedding, provides

a means to reason about the generated circuits as data objects within the host language. Nonetheless, these circuit objects lack information

about their generators, or about the manner in which these where generated, which can be used for placement and analysis. In this paper, we

use reFLect as a functional language with reflection features, to enable us not only to access the circuits, but also the circuit generators. Through the use of code quotation and pattern matching, we propose a framework through which we can access the structure of the circuit in terms of nested blocks that map the generation flow that was followed by the generator.