Please use this identifier to cite or link to this item: https://www.um.edu.mt/library/oar/handle/123456789/72774
Title: Video transmission over 10G ethernet
Authors: Vassallo, Luke (2019)
Keywords: Ethernet (Local area network system)
Local area networks (Computer networks)
Streaming video
Streaming technology (Telecommunications)
Issue Date: 2019
Citation: Vassallo, L. (2019). Video transmission over 10G ethernet (Bachelor's dissertation).
Abstract: The set goals to be obtained in this dissertation were to design and implement a system capable of transmitting a real time digital video stream using a point-to-point 10G Ethernet link. The end deliverable went over the original objective, implementing a 40G aggregated Ethernet link - 80G capable - presented as an IP subsystem ready for integration into a larger system - the high frame rate camera developed by the MEMENTO project. An in-depth analysis of the Xilinx Communications Intellectual Property (IP) portfolio resulted in the design being a mix of readily available IP, custom developed hardware and associated software. This methodology allowed for rapid prototyping and testing of the 10G Ethernet link comprised of the 10G Ethernet MAC and 10GBASE-R PHY. Following hardware tests verifying it’s functionality, a streaming low latency Ethernet framing hardware was developed for presenting the video data to the MAC according to the IEEE802.3-2012. More testing proved the capability of transmitting and reconstructing a video stream at a sustained speed of 10Gbps, paving the way for link aggregation. Stream distribution hardware was then developed for bi-directional transfer of video data over a maximum of eight 10G Ethernet links. The aggregation hardware successfully sustained a throughput of 80Gbps when internally looped back. The final step interfaced four 10G Ethernet links to the video distribution hardware and after synchronization successfully achieved a throughput of 33.7Gbps. The limitations of the subsystem and it’s constituent components were understood through intensive iterative testing. As a result significant improvements can be implemented on the second design iteration.
Description: B.ENG.ELECTRICAL&ELECTRONIC
URI: https://www.um.edu.mt/library/oar/handle/123456789/72774
Appears in Collections:Dissertations - FacEng - 2019
Dissertations - FacEngESE - 2019

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