University Semiconductors Competence Centre

Design for Electromagnetic Compatibility

Design for Electromagnetic Compatibility

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Design for Electromagnetic Compatibility

This course is being offered by the USCC as part of the Malta Semiconductors Competence Centre consortium activities.

Overview

This four-day intensive training course introduces the fundamental principles of electromagnetic interference (EMI), electromagnetic compatibility (EMC), and electrostatic discharge (ESD) for engineers in the microelectronics industry. The course balances theoretical understanding with practical simulation-based learning, with each day consisting of a three-hour morning theory session and a three-hour afternoon laboratory session using the Sonnet electromagnetic simulator.

Participants will learn about various topics, including:

  • Sources of EMI
  • Coupling mechanisms
  • Feedback paths
  • Intrinsic noise
  • Conducted and radiated emissions
  • Common-mode and differential-mode noise
  • Grounding and power distribution
  • Filtering, shielding, and screening techniques

The course also emphasises EMC-oriented design methodologies for integrated circuits, packages, and PCB interconnections. Key areas of focus include layout practices, return-current control, decoupling, via stitching, guard structures, and power-supply noise reduction. Practical exercises with the Sonnet simulator allow participants to model interconnects, coupled traces, ground discontinuities, via transitions, shielding structures, filters, and to interpret S-parameters, current distributions, and coupling behaviour. Additionally, the course covers EMC legislation and standards, specifically the EMC Directive 2014/30/EU, the historical European framework 89/336/EEC, and EN/CISPR 55011. This links regulatory compliance with robust engineering practices. ESD topics addressed include static generation, discharge models, protection structures for digital, analogue, and radio frequency (RF) circuits, as well as the interaction between ESD protection and EMC performance. The course concludes with an integrated design challenge, in which participants diagnose, simulate, and improve a representative microelectronic layout.

Prerequisites

This course is designed for engineers, researchers, postgraduate students, IC/package/PCB designers, test engineers, and product development staff working with microelectronic circuits, radio frequency (RF) systems, mixed-signal electronics, sensors, embedded systems, power electronics, or EMC compliance. Participants should have basic knowledge of circuit theory, frequency-domain analysis, transmission lines, printed circuit board (PCB) or integrated circuit (IC) layout concepts, and simple interpretation of scattering parameters. Prior Sonnet experience is useful but not required.

Learning Outcomes

By the end of the course, delegates will be able to:

  • Identify EMI sources, including coupling paths and victim circuits, in the system design.
  • Distinguish between types of EMI, including conducted, radiated, common-mode, differential-mode, near-field, and far-field interference.
  • Construct electromagnetic models of interconnects, packages, grounds, power paths, apertures, and shields.
  • Use Sonnet Software to simulate PCB/interconnect structures to analyse S-parameters, current density, field distribution, resonances, and coupling.
  • Apply EMC-oriented design rules to layouts, grounding, return paths, power distribution networks, decoupling, shielding, filtering, and interconnections.
  • Relate EMC design decisions to relevant EU legislation and standards, including historical 89/336/EEC, current 2014/30/EU, and EN/CISPR 55011.
  • Explain ESD generation, discharge models, protection concepts, and the relationship between ESD robustness and EMC performance.
  • Propose design improvements for reducing EMI and improving EMC in microelectronic circuits and systems.

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Course Details

Start Date: 14-Sep-2026

End Date: 17-Sep-2026

Time: 9:00 to 12:00 & 13:00 to 16:00 each day (CET)

Location: Online Sessions

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Course Schedule

Day 1: EMI Fundamentals, Coupling Mechanisms and Basic EM Modelling

  • Introduction to EMI, EMC and ESD
  • EMI Sources in Microelectronic Systems
  • Feedback and Coupling Mechanisms
  • Introduction to EM Modelling for EMI Analysis
  • Sonnet Lab 1: Basic EMI Coupling and Interconnect Behaviour

Day 2: EMI Prediction, Measurement, Grounds, Power Paths and Filtering

  • EMI System Modelling and Prediction
  • EMI Measurement Fundamentals
  • Grounds and Return Paths
  • Power Supply Paths and Noise Reduction
  • Sonnet Lab 2: Ground Return, Via Transitions and Filtering

Day 3: EMC Design Methodology, Shielding, Screening and Legislation

  • EMC Design Methodology
  • EMC in Integrated Circuit Layout
  • Electromagnetic Screening and Shielding
  • EMC Legislation and Standards
  • Sonnet Lab 3: Shielding, Apertures and Coupling Reduction

Day 4: ESD, Protection Structures, EMC Interaction and Integrated Design Projects

  • Static Generation and Discharge Physics
  • ESD Models
  • ESD Protection in Microelectronic Circuits
  • ESD versus EMC
  • Sonnet Lab 4: Integrated EMC Design Challenge

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Simulators:

  • Sonnet Software

Reading List

  • Sonia Ben Dhia, Mohamed Ramdani, Etienne Sicard, Electromagnetic Compatibility of Integrated Circuits: Techniques for Low Emission and Susceptibility, Springer, 2006 Edition (21 Dec. 2005), ISBN: 0387266003.
  • Dipak L. Sengupta and Valdis V. Liepa, Applied Electromagnetics and Electromagnetic Compatibility, Wiley-Interscience, 2006, ISBN 0471165492.

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Privacy Policy

Applicant data is only retained for as long as necessary to fulfill the purpose for which it is collected, and in accordance with the University of Malta's privacy policy

The project is supported by the Chips Joint Undertaking and its members under grant agreement n.º 101217761.


https://www.um.edu.mt/uscc/upskillingcourses/designforelectromagneticcompatibility/