
This course is being offered by the USCC as part of the Malta Semiconductors Competence Centre consortium activities.
This four-day intensive training course introduces the fundamental principles of electromagnetic interference (EMI), electromagnetic compatibility (EMC), and electrostatic discharge (ESD) for engineers in the microelectronics industry. The course balances theoretical understanding with practical simulation-based learning, with each day consisting of a three-hour morning theory session and a three-hour afternoon laboratory session using the Sonnet electromagnetic simulator.
Participants will learn about various topics, including:
The course also emphasises EMC-oriented design methodologies for integrated circuits, packages, and PCB interconnections. Key areas of focus include layout practices, return-current control, decoupling, via stitching, guard structures, and power-supply noise reduction. Practical exercises with the Sonnet simulator allow participants to model interconnects, coupled traces, ground discontinuities, via transitions, shielding structures, filters, and to interpret S-parameters, current distributions, and coupling behaviour. Additionally, the course covers EMC legislation and standards, specifically the EMC Directive 2014/30/EU, the historical European framework 89/336/EEC, and EN/CISPR 55011. This links regulatory compliance with robust engineering practices. ESD topics addressed include static generation, discharge models, protection structures for digital, analogue, and radio frequency (RF) circuits, as well as the interaction between ESD protection and EMC performance. The course concludes with an integrated design challenge, in which participants diagnose, simulate, and improve a representative microelectronic layout.
This course is designed for engineers, researchers, postgraduate students, IC/package/PCB designers, test engineers, and product development staff working with microelectronic circuits, radio frequency (RF) systems, mixed-signal electronics, sensors, embedded systems, power electronics, or EMC compliance. Participants should have basic knowledge of circuit theory, frequency-domain analysis, transmission lines, printed circuit board (PCB) or integrated circuit (IC) layout concepts, and simple interpretation of scattering parameters. Prior Sonnet experience is useful but not required.
Learning Outcomes
By the end of the course, delegates will be able to:
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Start Date: 14-Sep-2026
End Date: 17-Sep-2026
Time: 9:00 to 12:00 & 13:00 to 16:00 each day (CET)
Location: Online Sessions
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Day 1: EMI Fundamentals, Coupling Mechanisms and Basic EM Modelling
Day 2: EMI Prediction, Measurement, Grounds, Power Paths and Filtering
Day 3: EMC Design Methodology, Shielding, Screening and Legislation
Day 4: ESD, Protection Structures, EMC Interaction and Integrated Design Projects
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Simulators:
Reading List
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Privacy Policy
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The project is supported by the Chips Joint Undertaking and its members under grant agreement n.º 101217761.